bus mastering - определение. Что такое bus mastering
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Что (кто) такое bus mastering - определение

SYSTEM FOR MULTIPLE BUS ACCESS
Bus Master; Bus master; First party DMA; Bus arbiter; Bus arbitration; First-party DMA
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bus mastering         
Bus mastering         
In computing, bus mastering is a feature supported by many bus architectures that enables a device connected to the bus to initiate direct memory access (DMA) transactions. It is also referred to as first-party DMA, in contrast with third-party DMA where a system DMA controller actually does the transfer.
bus master         
<architecture> The device in a computer which is driving the address bus and bus control signals at some point in time. In a simple architecture only the (single) CPU can be bus master but this means that all communications between ("slave") I/O devices must involve the CPU. More sophisticated architectures allow other capable devices (or multiple CPUs) to take turns at controling the bus. This allows, for example, a network controller card to access a disk controller directly while the CPU performs other tasks which do not require the bus, e.g. fetching code from its cache. Note that any device can drive data onto the data bus when the CPU reads from that device, but only the bus master drives the address bus and control signals. Direct Memory Access is a simple form of bus mastering where the I/O device is set up by the CPU to read from or write to one or more contiguous blocks of memory and then signal to the CPU when it has done so. Full bus mastering (or "First Party DMA", "bus mastering DMA") implies that the I/O device is capable of performing more complex sequences of operations without CPU intervention (e.g. servicing a complete NFS request). This will normally mean that the I/O device contains its own processor or microcontroller. See also distributed kernel. (1996-08-26)
First Party DMA         
Mastering (audio)         
  • A common mastering processor for [[dynamic range compression]]
  • Optimum Digital Levels with respect to the Full Digital Scale (dBFSD)
FORM OF AUDIO POST-PRODUCTION
Remasters; Master recording; Master Tape; Gold master; Music mastering; Master record; Gold Master; Compact Disc Mastering; Master copy; Master tapes; CD mastering; Cd mastering; Master track; Compact Disc mastering; Master Recording; Master tape; Master recordings; Master Reel; Mastered; Master (audio); Lacquer master; Mastering (music); Audio mastering; Master reel
Mastering, a form of audio post production, is the process of preparing and transferring recorded audio from a source containing the final mix to a data storage device (the master), the source from which all copies will be produced (via methods such as pressing, duplication or replication). In recent years digital masters have become usual, although analog masters—such as audio tapes—are still being used by the manufacturing industry, particularly by a few engineers who specialize in analog mastering.
Mastered         
  • A common mastering processor for [[dynamic range compression]]
  • Optimum Digital Levels with respect to the Full Digital Scale (dBFSD)
FORM OF AUDIO POST-PRODUCTION
Remasters; Master recording; Master Tape; Gold master; Music mastering; Master record; Gold Master; Compact Disc Mastering; Master copy; Master tapes; CD mastering; Cd mastering; Master track; Compact Disc mastering; Master Recording; Master tape; Master recordings; Master Reel; Mastered; Master (audio); Lacquer master; Mastering (music); Audio mastering; Master reel
·Impf & ·p.p. of Master.
computer bus         
  • conventional PCI]] bus card slot (very bottom)
SYSTEM THAT TRANSFERS DATA BETWEEN COMPONENTS WITHIN A COMPUTER
Data bus; Address bus; Computer buses; Memory bus; Bus (computer); I/O bus; Internal bus; 100MHz bus; 133MHz bus; Asynchronous bus; Synchronous bus; PC bus; Hardware bus; External data bus; Computer bus; RAM bus; External bus; Cache bus; Digital bus; Computer/bus; Interconnect (computing); Data buses; Draft:Data Bus; Data highway; Address line; Motherboard bus; Processor bus
bus
address bus         
  • conventional PCI]] bus card slot (very bottom)
SYSTEM THAT TRANSFERS DATA BETWEEN COMPONENTS WITHIN A COMPUTER
Data bus; Address bus; Computer buses; Memory bus; Bus (computer); I/O bus; Internal bus; 100MHz bus; 133MHz bus; Asynchronous bus; Synchronous bus; PC bus; Hardware bus; External data bus; Computer bus; RAM bus; External bus; Cache bus; Digital bus; Computer/bus; Interconnect (computing); Data buses; Draft:Data Bus; Data highway; Address line; Motherboard bus; Processor bus
<processor> The connections between the CPU and memory which carry the address from/to which the CPU wishes to read or write. The number of bits of address bus determines the maximum size of memory which the processor can access. See also data bus. (1995-03-22)
Bus (computing)         
  • conventional PCI]] bus card slot (very bottom)
SYSTEM THAT TRANSFERS DATA BETWEEN COMPONENTS WITHIN A COMPUTER
Data bus; Address bus; Computer buses; Memory bus; Bus (computer); I/O bus; Internal bus; 100MHz bus; 133MHz bus; Asynchronous bus; Synchronous bus; PC bus; Hardware bus; External data bus; Computer bus; RAM bus; External bus; Cache bus; Digital bus; Computer/bus; Interconnect (computing); Data buses; Draft:Data Bus; Data highway; Address line; Motherboard bus; Processor bus
In computer architecture, a bus (shortened form of the Latin [and historically also called data highway or databus) is a communication system that transfers data] between components inside a [[computer, or between computers. This expression covers all related hardware components (wire, optical fiber, etc.
data bus         
  • conventional PCI]] bus card slot (very bottom)
SYSTEM THAT TRANSFERS DATA BETWEEN COMPONENTS WITHIN A COMPUTER
Data bus; Address bus; Computer buses; Memory bus; Bus (computer); I/O bus; Internal bus; 100MHz bus; 133MHz bus; Asynchronous bus; Synchronous bus; PC bus; Hardware bus; External data bus; Computer bus; RAM bus; External bus; Cache bus; Digital bus; Computer/bus; Interconnect (computing); Data buses; Draft:Data Bus; Data highway; Address line; Motherboard bus; Processor bus
<architecture> The bus (connections between and within the CPU, memory, and peripherals) used to carry data. Other connections are the address bus and control signals. The width and clock rate of the data bus determine its data rate (the number of bytes per second it can carry), which is one of the main factors determining the processing power of a computer. Most current processor designs use a 32-bit bus, meaning that 32 bits of data can be transferred at once. Some processors have an internal data bus which is wider than their external bus in order to make external connections cheaper while retaining some of the benefits in processing power of a wider bus. See also data path. (1995-01-16)

Википедия

Bus mastering

In computing, bus mastering is a feature supported by many bus architectures that enables a device connected to the bus to initiate direct memory access (DMA) transactions. It is also referred to as first-party DMA, in contrast with third-party DMA where a system DMA controller actually does the transfer.

Some types of buses allow only one device (typically the CPU, or its proxy) to initiate transactions. Most modern bus architectures, such as PCI, allow multiple devices to bus master because it significantly improves performance for general-purpose operating systems. Some real-time operating systems prohibit peripherals from becoming bus masters, because the scheduler can no longer arbitrate for the bus and hence cannot provide deterministic latency.

While bus mastering theoretically allows one peripheral device to directly communicate with another, in practice almost all peripherals master the bus exclusively to perform DMA to main memory.

If multiple devices are able to master the bus, there needs to be a bus arbitration scheme to prevent multiple devices attempting to drive the bus simultaneously. A number of different schemes are used for this; for example SCSI has a fixed priority for each SCSI ID. PCI does not specify the algorithm to use, leaving it up to the implementation to set priorities.